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Electronic Design Automation Synthesis, Verification, And Test
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Description This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an “adjacent” field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs to learn the concepts, principles, data structures, algorithms, and architectures of the EDA flow will benefit from this book.
Covers complete spectrum of the EDA flow, from ESL design modeling to logic/test synthesis, verification, physical design, and test – helps EDA newcomers to get “up-and-running” quickly Includes comprehensive coverage of EDA concepts, principles, data structures, algorithms, and architectures – helps all readers improve their VLSI design competence Contains latest advancements not yet available in other books, including Test compression, ESL design modeling, large-scale floorplanning, placement, routing, synthesis of clock and power/ground networks – helps readers to design/develop testable chips or products Includes industry best-practices wherever appropriate in most chapters – helps readers avoid costly mistakes
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Bookflare.net.txt
52 B
Electronic Design Automation Synthesis, Verification, and Test.epub
3.9 MB
Electronic Design Automation Synthesis, Verification, and Test.pdf
